The present invention relates to a semiconductor device and a semiconductor device manufacturing method, and more specifically relates to a semiconductor device comprising a plurality of insulator capacitors and a manufacturing method thereof.
A conventional example of an insulator capacitor (to be referred to as xe2x80x9cMIS capacitorxe2x80x9d hereinafter) will be described with reference to FIG. 4. FIG. 4 shows an MIS capacitor device formed in, for example, a bipolar IC. For example, in FIG. 4, an N type epitaxial layer 122 is formed on a P type semiconductor substrate 121, and a silicon oxide layer or so-called LOCOS 123 formed by local oxidation of silicon and a device isolation diffusion layer 124 consisting of a P type diffusion layer and formed below the LOCOS 123, both of which layers become a device isolation region, are formed on the epitaxial layer 122. The device isolation diffusion layer 124 is formed to reach the semiconductor substrate 121. An N type semiconductor region 113 doped with N type impurities is formed on the epitaxial layer 122 defined by the device isolation region. A conventional MIS capacitor 101 is constituted by forming an opening portion 127 in a first interlayer insulating film 126 formed on a surface including a portion on the semiconductor region 113 with the semiconductor region 113 serving as a lower electrode, forming an insulating film (or a so-called dielectric film) 111 on the semiconductor region 113 facing this opening portion 127, and forming an upper electrode 112 of a polysilicon film on the insulating film 111. Further, a second interlayer insulating film 128 is formed to cover the upper electrode 112, a wiring 130 connected to the upper electrode 112 through an opening portion formed at a position in the second interlayer insulating film 128, which position corresponds to the upper electrode 112, is formed, and a wiring 131 connected to the lower electrode 113 through an opening portion formed at positions in the first and second interlayer insulating films 126 and 128, which positions correspond to the lower electrode 113, is formed.
In case of this MIS capacitor 101, the effective area thereof is determined according to the area of the opening portion 127 in the first interlayer insulating film 126, and the capacitance value thereof is determined according to the property and thickness of the insulating film (or dielectric film) 111 provided in the opening portion 127. Actually, however, even on the peripheral portion of the opening portion 127, a parasitic capacitance is generated between the upper electrode 112 and the lower electrode 113 with the first interlayer insulating film 126 and the insulating film (or dielectric film) 111 put between the upper and lower electrodes 112 and 113. This parasitic capacitance is added to an overall capacitance value proportionally to the peripheral length of the upper electrode 112 and that of the insulating film (or dielectric film) 111 on the peripheral portion of the opening portion 127.
Meanwhile, in case of the conventional semiconductor device, the applicable capacitance value range of the MIS capacitor is often in the order of 1 pF or more. It has hardly been assumed that capacitance values particularly in the applicable range of 100 fF or less are used. In particular, the required performance of the ordinary MIS capacitor is that the MIS capacitor has a capacitance value used frequently, i.e., a capacitance value per unit area as high as possible in a region in the order of pF to nF with a view of reducing the area of a circuit, a small area, high accuracy and high reliability. To meet this requirement, with an ordinary MIS capacitor formation technique, a silicon nitride (Si3N4) film [film thickness: about 20 nm to 50 nm] having a high dielectric constant and advantageous in reliability is often used as the dielectric film. The capacitance value per unit area of the MIS capacitor having the structure stated above is about 1 fF/xcexcm2 to 3 fF/xcexcm2.
In recent years, as signal processing is accelerated, the frequency of, for example, the circuit for an optical pickup of an optical disk (CD, DVD or the like) or a so-called PDIC (photodiode integrated circuit) becomes higher and an MIS capacitor in a region having a capacitance value of 100 fF or less is required as an MIS capacitor in the circuit.
Using the circuit configuration of the PDIC shown in FIG. 5, an example of using the MIS capacitor in a region having a capacitance value of 100 fF or less will be described. As shown in FIG. 5, an ordinary PDIC 140 consists of a photodiode 141 serving as a current source and a current-voltage conversion circuit (or so-called IV amplifier) 142. The photodiode 141 equivalently consists of a junction capacitance CPD and a photoelectric current iPD. The current-voltage conversion circuit 142 has a differential amplifier A. A predetermined bias voltage Vc is applied to a non-inverting input terminal of the differential amplifier A and a cathode of the photodiode 141 is connected to a inverting input terminal of the differential amplifier A through a wiring 143. A resistance Rt and a capacitance Ct are connected in parallel between the inverting input terminal of the differential amplifier A and the output terminal tout thereof from which an output voltage vo is obtained. Reference symbol CH denotes a wiring capacitance.
The frequency of the current-voltage conversion circuit 142 is expressed by Mathematical Expression 1 using the resistance Rt and the capacitance Ct shown in FIG. 5.
[Mathematical Expression 1]
f=1/(2xcfx80xc2x7Rtxc2x7Ct) 
For example, if an output voltage vo of 300 mV is necessary while the light receiving sensitivity S of the photodiode is 0.4 A/W and laser power P is 10 xcexcW, the following relationship is obtained:
Rt=vo/iPD=300exe2x88x923/(0.4xc3x9710exe2x88x926)=75000 xcexa9=75k xcexa9
As the read/write rates of optical disks (e.g., CD and DVD) are accelerated, demand for an improvement in the frequency characteristics of the PDIC 140 arises. For example, the PDIC 140 is required to have a cutoff frequency fc of about 100 MHz of a 10 times speed DVD.
If it is assumed that the cutoff frequency fc of the PDIC 140 is rate-controlled by the frequency characteristics of the current-voltage conversion circuit 142, the required MIS capacitance Ct is obtained using the above [Mathematical Expression 1] as follows:
100MHz=1/(2xcfx80xc2x775kxcexa9xc2x7Ct) 
Ct=2.1exe2x88x9214[F]=21[fF]
However, if the conventional MIS capacitor 101 is used, the ratio of a parasitic capacitance on the peripheral portion of the MIS capacitor to a capacitance formed by the effective area (or the area of the so-called opening portion 127) suddenly increases in a region having a capacitance value of 1 pF or less which is not supposed to fall in the applicable range. In other words, if the capacitance value is about 1 pF or less, the influence of the parasitic capacitance on the peripheral portion increases according to the increase of the peripheral length to area ratio of the MIS capacitor. Following this, the deterioration of the unevenness of the MIS capacitor resulting from the unevenness of the parasitic capacitance stated above (so-called controllability of capacitance value) becomes conspicuous. Taking an MIS capacitor in a currently conducted manufacturing process as an example, the unevenness of the MIS capacitor with a capacitance value of 10 fF is approximately xc2x150% (see a second MIS capacitor curve II shown in FIG. 2).
Under these circumstances, it is necessary to develop a semiconductor device having an MIS capacitor having a high capacitance value (e.g., in a region having a capacitance value exceeding 100 fF) and an MIS capacitor having a low capacitance value (e.g., in a region having a capacitance value of 100 fF or less) mounted on a common semiconductor substrate. In the development of the semiconductor device of this type, it is demanded that the unevenness of capacitance values is suppressed to be little within a practicable range while suppressing the occupied area of each MIS capacitor within a predetermined allowable range on an integrated circuit, and that the semiconductor device of this type can be manufactured without increasing the number of manufacturing steps.
The present invention provides a semiconductor device and a semiconductor device manufacturing method made to solve the above-stated disadvantages.
A semiconductor device according to the present invention is a semiconductor device comprising a first insulator capacitor formed on a substrate; and a second insulator capacitor formed on the substrate, and having a higher capacitance than a capacitance of the first insulator capacitor, wherein the first insulator capacitor is constituted out of a first conductive material region formed on the substrate; a first insulating film serving as both an interlayer insulating film and a dielectric film of the first insulator capacitor, and formed on the first conductive material region; a second insulating film serving as a part of the dielectric film of the first insulator capacitor and a dielectric film of the second insulator capacitor, and formed on the first insulating film; and a conductive material film formed on the second insulating film, and the capacitance of the first insulator capacitor is determined by a formation area of the dielectric film first conductive material film.
The first insulating film can be formed out of a single or a plurality of silicon oxide layers, and the second insulating film is formed out of a silicon nitride layer.
A capacitance value of the first insulator capacitor can be set at not more than 100 fF.
Also, a capacitance value of the first insulator capacitor can be set at not more than 100 fF, and a capacitance value of the second insulator capacitor can be set at a value exceeding 100 fF.
In the above-stated semiconductor device, the dielectric film of the first insulator capacitor is constituted out of the first insulating film and the second insulating film to thereby make the dielectric film thick, and the second insulating film is formed out of, for example, a silicon nitride film and the first insulating film is formed out of, for example, a silicon oxide film having a lower dielectric constant than that of the second insulating film, whereby a capacitance value per unit area is lowered, an MIS capacitor area is increased and a peripheral length to area ratio in a low capacitance region is made low. By determining the capacitance value of the first insulator capacitor according to the area of the upper electrode (i.e., the dielectric film), a parasitic capacitance generated in the peripheral portion is reduced per se. The first insulator capacitor is constituted as stated above, whereby the first insulator capacitor becomes a highly accurate insulator capacitor corresponding to a low capacitance region of about 10 fF to 100 fF. Accordingly, the first insulator capacitor is capable of suppressing the unevenness of capacitance values within a practical range while suppressing its occupied area to be small within a predetermined allowable range on an integrated circuit, and capable of corresponding to the low capacitance region having a required capacitance value of 100 fF or less. Besides, the first insulator capacitor is highly accurate and excellent in reliability. In addition, since the silicon nitride film used for the conventional MIS capacitor is used as a part of the dielectric film, it is expected that the first insulator capacitor has a film property equivalent to or higher than that of the conventional MIS capacitor which film property influences the reliability of the MIS capacitor.
According to the present invention, the semiconductor device stated above is constituted so that the first conductive material region serving as a lower electrode of the first insulator capacitor and the second conductive material region serving as a lower electrode of the second insulator capacitor are formed in a common conductive material region; a part of the dielectric film of the first insulator capacitor and an insulating film having an opening portion determining the capacitance of the second insulator capacitor are formed by the first insulating film; a remaining part of the dielectric film of the first insulator capacitor and the dielectric film of the second insulator capacitor are formed by the second insulating film; and an upper electrode of the first insulator capacitor and an upper electrode of the second insulator capacitor are formed by a common conductive material film.
By thus constituting the semiconductor device, it is possible to manufacture a semiconductor device having the first insulator capacitor having a low capacitance value of 100 fF or less and the second insulator capacitor having a high capacitance value exceeding 100 fF provided on a common substrate, without increasing the number of manufacturing steps.
A semiconductor device manufacturing method according to the present invention is a method of manufacturing a semiconductor device having a first insulator capacitor and a second insulator capacitor formed on a semiconductor substrate, the first insulator capacitor and the second insulator capacitor having different unit capacitance values, the method comprising the steps of: doping the semiconductor substrate with impurities, and forming a first conductive material region and a second conductive material region; forming a first insulating film on the first conductive material region and the second conductive material region, the first insulating film serving as both an interlayer insulating film and a dielectric film of the first insulator capacitor; forming an opening portion of the first insulating film on the second conductive material region; forming a second insulating film on the first insulating film and in the opening portion, the second insulating film serving as both a part of the dielectric film of the first insulator capacitor and a dielectric film of the second insulator capacitor; and forming a conductive material film on the second insulating film, the conductive material film serving as an upper electrode of the first insulator capacitor and an upper electrode of the second insulator capacitor, and wherein a capacitance of the first insulator capacitor is determined by a formation area of the conductive material film.
The first insulating film can be formed out of a single or a plurality of silicon oxide films, and the second insulating film can be formed out of a silicon nitride film.
According to the semiconductor device manufacturing method stated above, the dielectric film of the first insulator capacitor is formed out of the first insulating film and the second insulating film to thereby make the dielectric film thick, and the second insulating film is formed out of, for example, a silicon nitride film and the first insulating film is formed out of, for example, a silicon oxide film having a lower dielectric constant than that of the second insulating film, whereby a capacitance value per unit area is lowered, an MIS capacitor area is increased and a peripheral length to area ratio in a low capacitance region is made low. Further, by determining the capacitance value according to the area of the upper electrode (or the dielectric film), a parasitic capacitance generated in the peripheral portion is reduced per se. By employing the above-stated manufacturing method, a highly accurate insulator capacitor corresponding to a low capacitance region of about 10 fF to 100 fF is manufactured. Accordingly, the first insulator capacitor corresponding to the low capacitance region having a required capacitance value of 100 fF or less can be formed while ensuring high accuracy and excellent reliability.
Moreover, since the silicon nitride film used for the conventional MIS capacitor is used as a part of the dielectric film, it is expected that the first insulator capacitor has a film property equivalent to or higher than that of the conventional MIS capacitor which film property influences the reliability of the MIS capacitor. Besides, it is possible to form the MIS capacitor from a normal bipolar transistor process without increasing the number of manufacturing steps.
Since there is no need to add a new step to the step of forming the second insulator capacitor so as to form the first insulator capacitor, no load is given to the process.
For the above-stated reasons, two types of insulator capacitor having different structures can be separately used for capacitance regions for which the respective capacitors are responsible, i.e., can be used in a region having a value exceeding 100 fF and a region having a value of 100 fF or less, respectively. Thus, compared with a conventional case, it is possible to provide highly accurate insulator capacitors in a wide range.